rajamesandClaude Opus 5.5
067f317c47
First code for StarForth v4 (JUSTIFICATION.md section 10, step 1): one node of the 32-instruction core as a C99 model, with cell width as a build parameter. - Node: P, A, B, F18 circular stacks (10 and 9 deep, D-2), word-addressed memory (D-1), 5% guard bands on every bounded list. - Instruction word: six 5-bit slots in 32 bits at every cell width. - Executor: all 32 opcodes of DECOMPOSITION.md 1.3. Cell arithmetic wraps explicitly; no signed overflow or implementation-defined shift. - Heat: per-opcode and per-call-target counters and the anti-clock, driven by instruction retirement (1.4, D-6 interim). - Slot packer and runner for tests, and a reference unsigned multiply in plain C99 with no 128-bit type. Tests run at 32- and 64-bit cells, and under ASan and UBSan. They cover every opcode and execute the first section 4 definitions (NIP SWAP OR NEGATE ROT 0< 0= 2DUP - U<) against the C operation each stands for. UM* as written in section 4 is exact only while u1 <= 2^(n-2). Two known failing cases are pinned in test_foundation.c until it is rewritten. DECOMPOSITION.md: record D-9, the instruction word is 32 bits at every cell width (ruled 2026-10-02). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
116 lines
2.8 KiB
C
116 lines
2.8 KiB
C
/* asm.c -- slot packer for test programs. See asm.h. */
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#include "v4/asm.h"
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static void put(v4_asm *as, unsigned op)
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{
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as->cur |= (v4_iword)(op & 0x1Fu) << V4_SLOT_LOW_BIT(as->slot);
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as->slot++;
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}
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static void emit(v4_asm *as, v4_cell value)
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{
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if (as->here < 0 || (v4_ucell)as->here >= V4_NODE_WORDS) {
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as->error = 1;
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return;
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}
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v4_node_store(as->n, as->here, value);
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as->here++;
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}
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/* Write out the word being built, then the literals it owes. */
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static void flush(v4_asm *as)
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{
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if (as->slot == 0) return;
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while (as->slot < V4_SLOT_COUNT) put(as, V4_OP_NOP);
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emit(as, (v4_cell)as->cur);
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for (unsigned i = 0; i < as->nlit; i++) emit(as, as->lit[i]);
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as->cur = 0;
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as->slot = 0;
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as->nlit = 0;
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}
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/* 1 if a branch in `slot`, executing with P = p, can reach `target`. */
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static int reachable(v4_cell p, unsigned slot, v4_cell target)
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{
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v4_ucell mask = (v4_ucell)v4_iword_slot_mask(slot);
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return (((v4_ucell)p ^ (v4_ucell)target) & ~mask) == 0;
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}
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void v4_asm_begin(v4_asm *as, v4_node *n, v4_cell origin)
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{
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as->n = n;
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as->here = origin;
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as->cur = 0;
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as->slot = 0;
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as->nlit = 0;
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as->error = 0;
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}
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void v4_asm_op(v4_asm *as, unsigned op)
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{
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if (op >= V4_OPCODE_COUNT || v4_op_is_branch(op) || op == V4_OP_FETCH_P) {
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as->error = 1;
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return;
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}
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put(as, op);
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if (op == V4_OP_SEMI || op == V4_OP_EX || as->slot == V4_SLOT_COUNT) flush(as);
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}
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void v4_asm_lit(v4_asm *as, v4_cell value)
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{
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put(as, V4_OP_FETCH_P);
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as->lit[as->nlit++] = value;
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if (as->slot == V4_SLOT_COUNT) flush(as);
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}
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v4_asm_ref v4_asm_branch_fwd(v4_asm *as, unsigned op)
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{
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v4_asm_ref ref;
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if (!v4_op_is_branch(op)) as->error = 1;
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if (!v4_iword_branch_legal(as->slot)) flush(as);
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ref.addr = as->here;
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ref.slot = as->slot;
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/* The word has been fetched and every literal before the branch consumed
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* by the time the branch executes. */
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ref.p = as->here + 1 + (v4_cell)as->nlit;
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put(as, op);
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as->slot = V4_SLOT_COUNT; /* the rest of the word is address */
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flush(as);
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return ref;
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}
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void v4_asm_resolve(v4_asm *as, v4_asm_ref ref, v4_cell target)
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{
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v4_ucell mask = (v4_ucell)v4_iword_slot_mask(ref.slot);
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v4_ucell word;
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if (as->error) return;
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if (!reachable(ref.p, ref.slot, target)) {
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as->error = 1;
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return;
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}
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word = (v4_ucell)v4_node_load(as->n, ref.addr);
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word = (word & ~mask) | ((v4_ucell)target & mask);
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v4_node_store(as->n, ref.addr, (v4_cell)word);
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}
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void v4_asm_branch(v4_asm *as, unsigned op, v4_cell target)
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{
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v4_asm_resolve(as, v4_asm_branch_fwd(as, op), target);
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}
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v4_cell v4_asm_label(v4_asm *as)
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{
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flush(as);
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return as->here;
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}
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int v4_asm_ok(v4_asm *as)
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{
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flush(as);
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return !as->error;
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}
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