starkernel: item 4.3.5 -- amd64 I/O APIC + i8042 keyboard, interrupt-driven
Punch list §25 item 4.3.5 complete. New ioapic.c/i8042.c drivers (MADT-derived I/O APIC base, no hardcoded constants) plus a KBD-SCAN/KBD-DEBUG diagnostic word pair. Three real bugs found and fixed en route, all blocking this item's own acceptance: a fatal LAPIC spurious-vector crash (nothing had driven a real external interrupt through the I/O APIC before), OVMF leaving the keyboard device itself scanning-disabled (0xF4 fix), and isr.S's stub table only having individually-numbered stubs through vector 32 -- everything above that, including our IRQ1 vector 33, silently reported as vector 255 regardless of which IDT slot actually fired. Verified live via QEMU sendkey against KBD-SCAN: correct XT Set-1 make/break codes for two different keys. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
This commit is contained in:
Robert Allan James
co-authored by
Claude Sonnet 5
Claude Sonnet 5
parent
78ff335b97
commit
88eb73cfe8
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/*
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StarForth — Steady-State Virtual Machine Runtime
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Copyright (c) 2023–2025 Robert A. James
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All rights reserved.
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This file is part of the StarForth project.
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Licensed under the StarForth License, Version 1.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at:
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https://github.com/star.4th@proton.me/StarForth/LICENSE.txt
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This software is provided "AS IS", WITHOUT WARRANTY OF ANY KIND,
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express or implied, including but not limited to the warranties of
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merchantability, fitness for a particular purpose, and noninfringement.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* i8042.c - PS/2 keyboard controller driver (amd64)
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*
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* Item 4.3.5 (FABRIC.md §27.5).
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*/
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#ifndef __STARKERNEL__
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#error "i8042.c is kernel-only"
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#endif
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#include <stdint.h>
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#include "starkernel/i8042.h"
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#include "console.h"
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#define I8042_DATA_PORT 0x60
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#define I8042_STATUS_PORT 0x64
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#define I8042_CMD_PORT 0x64
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#define I8042_STATUS_OUTPUT_FULL (1u << 0)
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#define I8042_STATUS_INPUT_FULL (1u << 1)
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#define I8042_CMD_READ_CONFIG 0x20
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#define I8042_CMD_WRITE_CONFIG 0x60
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#define I8042_CONFIG_IRQ1_ENABLE (1u << 0)
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#define I8042_DEV_CMD_ENABLE_SCANNING 0xF4
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#define I8042_DEV_ACK 0xFA
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/* Bounded wait -- command handshakes during one-time init only, never in
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* the interrupt path or a per-keystroke loop. */
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#define I8042_INIT_WAIT_ITERS 100000
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static inline void outb(uint16_t port, uint8_t val) {
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__asm__ volatile ("outb %0, %1" : : "a"(val), "Nd"(port));
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}
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static inline uint8_t inb(uint16_t port) {
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uint8_t val;
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__asm__ volatile ("inb %1, %0" : "=a"(val) : "Nd"(port));
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return val;
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}
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void i8042_init(void) {
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/* Drain any stale output byte left by firmware before enabling IRQ1 —
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* otherwise the first "interrupt" would really be this leftover byte
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* read via polling, not a real IRQ1 delivery. */
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while (inb(I8042_STATUS_PORT) & I8042_STATUS_OUTPUT_FULL) {
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(void)inb(I8042_DATA_PORT);
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}
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outb(I8042_CMD_PORT, I8042_CMD_READ_CONFIG);
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uint8_t config = inb(I8042_DATA_PORT);
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config |= I8042_CONFIG_IRQ1_ENABLE;
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outb(I8042_CMD_PORT, I8042_CMD_WRITE_CONFIG);
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outb(I8042_DATA_PORT, config);
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/* Tell the keyboard device itself to (re)enable scanning. OVMF's own
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* PS/2 driver commonly sends 0xF5 (disable scanning) to the device as
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* part of its own teardown before handoff, the same way it stops
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* driving the PIT/PIC -- the controller's IRQ1-enable bit above only
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* governs the controller, not whether the device generates scancodes
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* at all. Bounded waits: one-time init handshake, not steady-state
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* polling. */
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{
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int i;
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for (i = 0; i < I8042_INIT_WAIT_ITERS; i++) {
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if (!(inb(I8042_STATUS_PORT) & I8042_STATUS_INPUT_FULL)) break;
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}
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outb(I8042_DATA_PORT, I8042_DEV_CMD_ENABLE_SCANNING);
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for (i = 0; i < I8042_INIT_WAIT_ITERS; i++) {
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if (inb(I8042_STATUS_PORT) & I8042_STATUS_OUTPUT_FULL) {
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uint8_t resp = inb(I8042_DATA_PORT);
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if (resp == I8042_DEV_ACK) {
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console_println("i8042: keyboard ACKed enable-scanning");
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} else {
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console_println("i8042: keyboard responded (not ACK) to enable-scanning");
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}
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break;
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}
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}
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}
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console_println("i8042: IRQ1 enabled in controller config byte");
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}
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void i8042_drain_stale(void) {
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/* Edge-triggered IRQ1 + OBF already set at unmask time == no rising
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* edge ever again (the textbook "fires once, then never" pattern).
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* i8042_init()'s drain happens at M4; VM bootstrap runs for real wall
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* time between then and unmask, so re-drain immediately before. */
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while (inb(I8042_STATUS_PORT) & I8042_STATUS_OUTPUT_FULL) {
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(void)inb(I8042_DATA_PORT);
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}
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}
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/* Ring buffer: single producer (the ISR), single reader (i8042_pop_scancode(),
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* called from ordinary non-interrupt context, e.g. a diagnostic FORTH word).
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* 32 entries is far more than one QEMU test keypress burst can fill. */
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#define RING_SIZE 32
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static volatile uint8_t ring[RING_SIZE];
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static volatile uint8_t ring_head = 0; /* next slot the ISR writes */
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static volatile uint8_t ring_tail = 0; /* next slot the reader takes */
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/* Count of real keyboard IRQs serviced since boot -- a plain counter, no
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* I/O, is cheap enough to keep in the ISR itself and doubles as the
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* quickest way to confirm the interrupt path is alive without touching
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* the ring buffer at all. */
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volatile uint32_t g_i8042_isr_count = 0;
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void i8042_handle_irq(void) {
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/* Must always read 0x60, even to discard — otherwise OBF never clears
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* and the controller stops delivering further interrupts. */
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uint8_t scancode = inb(I8042_DATA_PORT);
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g_i8042_isr_count++;
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uint8_t next_head = (uint8_t)((ring_head + 1) % RING_SIZE);
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if (next_head != ring_tail) { /* drop the byte if the ring is full */
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ring[ring_head] = scancode;
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ring_head = next_head;
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}
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}
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int i8042_pop_scancode(uint8_t *out) {
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if (ring_tail == ring_head) return 0; /* empty */
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*out = ring[ring_tail];
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ring_tail = (uint8_t)((ring_tail + 1) % RING_SIZE);
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return 1;
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}
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