Reorganize source tree: kernel/, v3/, v4/ split and board infrastructure

Source tree reorganization:
- Move StarForth v3 engine to v3/ (src/, include/, Makefile)
- Move kernel to kernel/ (src/, include/, linker/, Makefile)
- Create v4/ skeleton for F18-ISA golden model (DECOMPOSITION.md, JUSTIFICATION.md)
- Move FABRIC-0..4.md to docs/fabric/
- Move ONTOLOGY.md and ROADMAP.md to docs/

Board infrastructure:
- Add boards/ser5/, boards/raspi/, boards/milkv/, boards/zynq7020/
- Each board has board.mk (ISA, CPU flags, boot recipe) and README.md
- Root Makefile becomes thin dispatcher: boot_image, all, clean, docs take TARGET
- make boot_image TARGET=SER5|RASPI|MILKV builds one GPT/MBR image per board
- ZYNQ7020 target exists but stops with clear error (ARMv7 port not built yet)
- scripts/mkdiskimage.sh builds disk images for all boards

Docs pipeline:
- docs/book/ with LaTeX master (main.tex) and Makefile
- pandoc converts Markdown to LaTeX at build time
- Two Lua filters: table-widths.lua (wide tables wrap), code-breaks.lua (inline code breaks)
- make docs builds single PDF (754 pages, 0 missing characters)
- make docs TARGET=<board> adds board appendix
- build/docs/<book|board>/meta.tex stamps git commit into PDF

Bug fixes:
- 42 include paths that only worked by accident now use correct relative paths
- clang-18 hardcode replaced with configurable CC variable (fixed aarch64 build)
- Pi 5: kernel_2712.img linked at 0x80000, .bss zeroed, memory reserved
- Doxyfile, .clang-tidy, README.md, Kconfig paths updated

Verified:
- Hosted v3 build passes 1012 tests, 0 failures
- SER5 image boots in QEMU (OVMF), POST passes, K exact (65536 = Q48_ONE)
- Milk-V image boots in QEMU (OpenSBI + U-Boot + bootefi), POST passes
- make clean TARGET=<board> removes only that board and its ISA objects
- make all builds all boards, hosted v3, and docs in one run

Co-authored-by: Junie <junie@jetbrains.com>

kernel/src/arch/aarch64/native_rpi5_entry.S

@@ -0,0 +1,97 @@
+/*
+ * native_rpi5_entry.S (aarch64) - Raspberry Pi 5 native (non-UEFI) entry
+ * stub (FABRIC-3.md §IV.3 item 1, 2026-09-04).
+ *
+ * **Never run on real hardware** -- the Pi 5 isn't in hand until
+ * 2026-09-17 (FABRIC-3.md §II). Compile-only-verified.
+ *
+ * Entered directly by Pi 5 firmware at the classic bare-metal load address
+ * 0x80000 (item 6, `config.txt`'s `os_check=0`, is still open -- that's
+ * what actually gets a real image loaded there; this file is just the
+ * code that would run once it is). No UEFI, no ACPI -- none of
+ * `boot/uefi_loader.c`'s PE-loader shape applies on this path. Per
+ * FABRIC-3.md §IV.1's own researched entry protocol:
+ *
+ *   x0 = 32-bit DTB pointer, upper 32 bits of the 64-bit register
+ *        UNSPECIFIED -- must mask before use.
+ *   x1-x3 = reserved / zero, unused here.
+ *
+ * This stub's own job: mask and capture that DTB pointer into
+ * `g_rpi5_dtb_ptr` (declared in `include/starkernel/rpi5_native_entry.h`),
+ * establish a dedicated stack -- this path has no EDK2 boot stack to
+ * inherit, there is no EDK2 at all here -- then tail-call
+ * `rpi5_native_boot()` (`rpi5_native_boot.c`, §IV.3 item 2), which builds
+ * `BootInfo` from the devicetree and calls the existing `kernel_main()`.
+ * `rpi5_native_boot()` never returns; the `wfe`/`b` loop after the `bl`
+ * exists only so this file's own control flow has somewhere defined to
+ * go if that contract is ever violated.
+ *
+ * Build-system note: `kernel/Makefile`'s `KERNEL_ASM` wildcards every
+ * `*.S` file in this directory into the kernel ELF build (not the PE/COFF
+ * loader build -- that list is explicit, boot.S/isr.S/switch.S only), so
+ * this file links into the ARCH=aarch64 QEMU/UEFI kernel ELF as dead
+ * code, and is the entry point of the separately-linked Pi 5 native
+ * image (`make boot_image TARGET=RASPI`):
+ * `kernel/linker/starkernel-native-rpi5.ld` places `.text.entry` first
+ * at 0x80000 and the image is flattened to `kernel_2712.img`.
+ *
+ * Pi 5 firmware loads only the file's bytes; `.bss` (NOLOAD) is whatever
+ * was in RAM. It is zeroed here, before anything in it -- including
+ * `g_rpi5_dtb_ptr` and this stub's own stack -- is used. x0 (the DTB
+ * pointer) is preserved across the loop; only x4-x6 are touched.
+ */
+
+    .section .bss
+    .align 8
+    .global g_rpi5_dtb_ptr
+g_rpi5_dtb_ptr:
+    .space 8                       /* uint64_t -- masked DTB pointer */
+
+    .align 4
+g_rpi5_native_stack:
+    .space 0x200000                 /* 2 MiB, same convention as the
+                                      * amd64/riscv64 kernel_entry.S
+                                      * BSS stacks */
+g_rpi5_native_stack_top:
+
+    .section .text.entry, "ax"
+    .global rpi5_native_start
+rpi5_native_start:
+    /* Mask x0 to its documented 32-bit DTB-pointer range (§IV.1: the
+     * upper 32 bits of the 64-bit register are unspecified by the
+     * firmware's own entry protocol). */
+    mov     x1, #0xffffffff
+    and     x0, x0, x1
+
+    /* Zero .bss: [__bss_start, __bss_end), both 16-byte aligned by the
+     * native linker script. */
+    adrp    x4, __bss_start
+    add     x4, x4, :lo12:__bss_start
+    adrp    x5, __bss_end
+    add     x5, x5, :lo12:__bss_end
+.Lbss_zero:
+    cmp     x4, x5
+    b.hs    .Lbss_done
+    stp     xzr, xzr, [x4], #16
+    b       .Lbss_zero
+.Lbss_done:
+
+    adrp    x2, g_rpi5_dtb_ptr
+    add     x2, x2, :lo12:g_rpi5_dtb_ptr
+    str     x0, [x2]
+
+    /* Establish this path's own dedicated stack. */
+    adrp    x0, g_rpi5_native_stack_top
+    add     x0, x0, :lo12:g_rpi5_native_stack_top
+    mov     sp, x0
+
+    /* x0 was clobbered above for the stack-top address -- reload the
+     * masked DTB pointer from g_rpi5_dtb_ptr before calling in. */
+    adrp    x0, g_rpi5_dtb_ptr
+    add     x0, x0, :lo12:g_rpi5_dtb_ptr
+    ldr     x0, [x0]
+    bl      rpi5_native_boot
+
+.Lhalt:
+    wfe
+    b       .Lhalt