Reorganize source tree: kernel/, v3/, v4/ split and board infrastructure

Source tree reorganization:
- Move StarForth v3 engine to v3/ (src/, include/, Makefile)
- Move kernel to kernel/ (src/, include/, linker/, Makefile)
- Create v4/ skeleton for F18-ISA golden model (DECOMPOSITION.md, JUSTIFICATION.md)
- Move FABRIC-0..4.md to docs/fabric/
- Move ONTOLOGY.md and ROADMAP.md to docs/

Board infrastructure:
- Add boards/ser5/, boards/raspi/, boards/milkv/, boards/zynq7020/
- Each board has board.mk (ISA, CPU flags, boot recipe) and README.md
- Root Makefile becomes thin dispatcher: boot_image, all, clean, docs take TARGET
- make boot_image TARGET=SER5|RASPI|MILKV builds one GPT/MBR image per board
- ZYNQ7020 target exists but stops with clear error (ARMv7 port not built yet)
- scripts/mkdiskimage.sh builds disk images for all boards

Docs pipeline:
- docs/book/ with LaTeX master (main.tex) and Makefile
- pandoc converts Markdown to LaTeX at build time
- Two Lua filters: table-widths.lua (wide tables wrap), code-breaks.lua (inline code breaks)
- make docs builds single PDF (754 pages, 0 missing characters)
- make docs TARGET=<board> adds board appendix
- build/docs/<book|board>/meta.tex stamps git commit into PDF

Bug fixes:
- 42 include paths that only worked by accident now use correct relative paths
- clang-18 hardcode replaced with configurable CC variable (fixed aarch64 build)
- Pi 5: kernel_2712.img linked at 0x80000, .bss zeroed, memory reserved
- Doxyfile, .clang-tidy, README.md, Kconfig paths updated

Verified:
- Hosted v3 build passes 1012 tests, 0 failures
- SER5 image boots in QEMU (OVMF), POST passes, K exact (65536 = Q48_ONE)
- Milk-V image boots in QEMU (OpenSBI + U-Boot + bootefi), POST passes
- make clean TARGET=<board> removes only that board and its ISA objects
- make all builds all boards, hosted v3, and docs in one run

Co-authored-by: Junie <junie@jetbrains.com>

kernel/src/arch/aarch64/rpi5_dtb.c

@@ -0,0 +1,93 @@
+/*
+  StarForth — Steady-State Virtual Machine Runtime
+  Copyright (c) 2023–2025 Robert A. James. All rights reserved.
+  Licensed under the StarForth License, Version 1.0.
+ */
+
+/**
+ * rpi5_dtb.c - Raspberry Pi 5 (BCM2712) devicetree-based peripheral
+ * discovery (FABRIC-3.md §IV.3, 2026-09-04).
+ *
+ * Confirmed directly against `bcm2712.dtsi` (raspberrypi/linux,
+ * rpi-6.12.y) before writing this, not assumed:
+ *
+ *   soc: soc@107c000000 {
+ *       compatible = "simple-bus";
+ *       ranges = <0x0 0x10 0x0 0x80000000>;
+ *       #address-cells = <1>;
+ *       #size-cells = <1>;
+ *       ...
+ *       uart10: serial@7d001000 {
+ *           compatible = "arm,pl011", "arm,primecell";
+ *           reg = <0x7d001000 0x200>;
+ *       };
+ *       mailbox: mailbox@7c013880 {
+ *           compatible = "brcm,bcm2835-mbox";
+ *           reg = <0x7c013880 0x40>;
+ *       };
+ *   };
+ *
+ * Every peripheral this file cares about lives under this one "soc"
+ * node, which applies exactly one translation to every child `reg`
+ * value: child address 0 maps to parent (CPU-physical) address
+ * 0x10_0000_0000 (`ranges`'s own `<0x0 0x10 0x0 ...>` — child cell 0,
+ * parent cells `0x10 0x0`, i.e. `0x10 << 32`). The child side's own
+ * `#address-cells = <1>` confirms each `reg` value's first cell is the
+ * whole child address (32-bit, no cell-splitting needed) before adding
+ * the offset. `fdt.c`'s reader deliberately does not parse `ranges`
+ * generally (it is "not a general devicetree library," per its own
+ * header comment) — this one, fixed, SoC-wide offset is applied here
+ * by name instead, since it is a single known hardware fact, not a
+ * general mechanism this codebase needs elsewhere yet.
+ */
+
+#include "starkernel/rpi5_dtb.h"
+#include "starkernel/fdt.h"
+
+/* soc@107c000000's own `ranges` offset -- see this file's own doc
+ * comment above for where it was confirmed. */
+#define BCM2712_SOC_RANGES_OFFSET 0x1000000000ULL
+
+/**
+ * @brief Read a devicetree `reg` property's first cell as big-endian.
+ *
+ * `fdt.c` keeps its own `be32()` helper file-local (freestanding, no
+ * shared byte-swap utility to reuse) -- duplicated here rather than
+ * exposing it, same "a few lines is simpler than a new shared
+ * dependency" precedent `tools/pkcs8_ed25519.c` already set in this
+ * codebase.
+ */
+static uint32_t reg_first_cell_be32(const unsigned char* b)
+{
+    return ((uint32_t) b[0] << 24) | ((uint32_t) b[1] << 16) |
+           ((uint32_t) b[2] << 8) | (uint32_t) b[3];
+}
+
+/**
+ * @brief Find @p compatible's node, read its `reg` base address, and
+ * apply the one fixed BCM2712 `soc`-node translation offset.
+ */
+static uint64_t rpi5_peripheral_base(const void* dtb, const char* compatible)
+{
+    const void* node;
+    const void* val;
+    uint32_t len;
+
+    node = fdt_find_node_by_compatible(dtb, compatible);
+    if (!node) return 0;
+
+    val = fdt_find_prop_in_node(dtb, node, "reg", &len);
+    if (!val || len < 4) return 0;
+
+    return BCM2712_SOC_RANGES_OFFSET + reg_first_cell_be32((const unsigned char*) val);
+}
+
+uint64_t rpi5_uart_base(const void* dtb)
+{
+    return rpi5_peripheral_base(dtb, "arm,pl011");
+}
+
+uint64_t rpi5_mailbox_base(const void* dtb)
+{
+    return rpi5_peripheral_base(dtb, "brcm,bcm2835-mbox");
+}