feat(v4.0.0): CONSOLE-RX and CONSOLE-STATUS on the single-node model
The console's receive side, standing in for the console node until the mesh exists, as CONSOLE-TX does for output. A data fetch (@, @+, @b) from CONSOLE-STATUS gives -1 when a character is pending and 0 when not; from CONSOLE-RX it gives the next character and takes it, or -1 with none pending. The characters come from a queue the test feeds. Instruction words and literals are still fetched with v4_node_load, so code at a register's address is never taken for the register. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
This commit is contained in:
co-authored by
Claude Opus 5.5
parent
03d8d991ef
commit
2c16183788
+3
-2
@@ -14,8 +14,9 @@ and every ISA, hosted and bare metal, must still reach its `ok` prompt.
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`make -C v4 test` passing is a development check, not acceptance.
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What exists so far is the single node: registers, circular stacks, memory, all
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32 opcodes, per-opcode and per-call-target heat, and a console capture
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register (`CONSOLE-TX`) standing in for the console node until the mesh exists. `make -C v4 test` builds
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32 opcodes, per-opcode and per-call-target heat, and three console
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registers (`CONSOLE-TX`, which captures output, and `CONSOLE-RX` and `CONSOLE-STATUS`, which hand out
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input a test feeds) standing in for the console node until the mesh exists. `make -C v4 test` builds
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and runs the tests at both cell widths; `make -C v4 sanitize` repeats them
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under ASan and UBSan. There is no compiler capsule, no POST and no K
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measurement yet.
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@@ -72,6 +72,14 @@ typedef struct {
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unsigned console_len; /* characters captured */
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unsigned console_dropped; /* characters that did not fit */
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unsigned char console[V4_CONSOLE_CAP];
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/* CONSOLE-RX and CONSOLE-STATUS (section 7). See
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* v4_node_console_input_attach below. */
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v4_cell console_rx; /* its word address, or -1: no input */
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v4_cell console_status; /* its word address, or -1 */
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unsigned input_len; /* characters fed */
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unsigned input_pos; /* characters taken; input_len - input_pos are pending */
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unsigned char input[V4_CONSOLE_CAP];
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} v4_node;
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/* Zero P, A and B, empty the stacks, and clear memory. Installs every
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@@ -143,4 +151,38 @@ void v4_node_store(v4_node *n, v4_cell addr, v4_cell value);
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* Passing -1 detaches. The address is the caller's choice. */
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void v4_node_console_attach(v4_node *n, v4_cell addr);
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/* CONSOLE-RX and CONSOLE-STATUS, the console's receive side, on the
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* single-node model.
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*
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* KEY and ?TERMINAL are device services too (DECOMPOSITION.md 5.10), and for
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* the same reason as CONSOLE-TX the model stands in for the console with two
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* memory-mapped registers and a queue of characters the test feeds.
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*
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* After v4_node_console_input_attach(n, rx, status), a data fetch (the
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* opcodes @, @+ and @b, which go through v4_node_fetch) from word address
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* `status` gives -1 when a character is pending and 0 when none is;
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* `rx` gives the next pending character, 0 .. 255, and takes it off
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* the queue; with none pending it gives -1 and takes nothing.
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* Fetching the status changes nothing. Neither fetch reads or writes
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* n->mem, a store to either address is an ordinary memory store, and
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* v4_node_load -- which the executor uses to fetch instruction words and
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* literals, and the assembler to patch them -- always reads memory, so code
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* and literals are never mistaken for the registers.
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*
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* v4_node_console_feed appends characters to the queue and returns how many
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* it took; the queue holds V4_CONSOLE_CAP characters that have not been
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* read. A node has no input until it is attached: v4_node_reset detaches it
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* (both addresses -1) and empties the queue. Attaching empties it too.
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* Passing -1 for both detaches. The addresses are the caller's choice and
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* must differ from each other and from CONSOLE-TX.
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*
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* Nothing here blocks. A KEY that must wait polls CONSOLE-STATUS, so on
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* this model a wait is a loop that runs until the test feeds a character. */
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void v4_node_console_input_attach(v4_node *n, v4_cell rx, v4_cell status);
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unsigned v4_node_console_feed(v4_node *n, const void *chars, unsigned len);
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/* A data fetch: what @, @+ and @b read at `addr`. The two receive registers
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* above when attached, memory otherwise. Same precondition as v4_node_load. */
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v4_cell v4_node_fetch(v4_node *n, v4_cell addr);
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#endif /* V4_NODE_H */
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+3
-3
@@ -91,14 +91,14 @@ void v4_exec_op(v4_node *n, v4_exec_state *es, v4_heat *h,
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n->p = add_wrap(n->p, 1);
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break;
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case V4_OP_FETCH_INC:
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v4_dstack_push(ds, v4_node_load(n, n->a));
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v4_dstack_push(ds, v4_node_fetch(n, n->a));
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n->a = add_wrap(n->a, 1);
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break;
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case V4_OP_FETCH_B:
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v4_dstack_push(ds, v4_node_load(n, n->b));
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v4_dstack_push(ds, v4_node_fetch(n, n->b));
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break;
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case V4_OP_FETCH_A:
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v4_dstack_push(ds, v4_node_load(n, n->a));
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v4_dstack_push(ds, v4_node_fetch(n, n->a));
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break;
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case V4_OP_STORE_P:
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v4_node_store(n, n->p, v4_dstack_pop(ds));
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@@ -12,6 +12,7 @@ void v4_node_reset(v4_node *n)
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v4_dstack_reset(&n->ds);
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v4_rstack_reset(&n->rs);
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v4_node_console_attach(n, -1);
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v4_node_console_input_attach(n, -1, -1);
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}
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int v4_node_guards_intact(const v4_node *n)
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@@ -44,6 +45,45 @@ void v4_node_store(v4_node *n, v4_cell addr, v4_cell value)
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n->mem[(unsigned)addr] = value;
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}
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v4_cell v4_node_fetch(v4_node *n, v4_cell addr)
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{
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/* console_rx and console_status are -1 when no input is attached, which
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* no valid address equals. */
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if (addr == n->console_status)
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return n->input_pos < n->input_len ? (v4_cell)-1 : (v4_cell)0;
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if (addr == n->console_rx) {
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v4_cell c;
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if (n->input_pos >= n->input_len) return (v4_cell)-1;
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c = (v4_cell)n->input[n->input_pos++];
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if (n->input_pos == n->input_len) n->input_pos = n->input_len = 0;
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return c;
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}
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return v4_node_load(n, addr);
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}
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void v4_node_console_input_attach(v4_node *n, v4_cell rx, v4_cell status)
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{
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n->console_rx = rx;
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n->console_status = status;
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n->input_len = 0;
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n->input_pos = 0;
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}
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unsigned v4_node_console_feed(v4_node *n, const void *chars, unsigned len)
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{
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const unsigned char *c = (const unsigned char *)chars;
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unsigned i, pending = n->input_len - n->input_pos, took = 0;
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/* Slide what is pending to the front so the whole buffer is usable. */
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if (n->input_pos > 0) {
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for (i = 0; i < pending; i++) n->input[i] = n->input[n->input_pos + i];
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n->input_pos = 0;
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n->input_len = pending;
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}
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while (took < len && n->input_len < V4_CONSOLE_CAP) n->input[n->input_len++] = c[took++];
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return took;
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}
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void v4_node_console_attach(v4_node *n, v4_cell addr)
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{
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n->console_tx = addr;
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+120
-2
@@ -1,4 +1,6 @@
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/* test_console.c -- the CONSOLE-TX capture register (node.h).
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/* test_console.c -- the console registers of the single-node model (node.h):
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* CONSOLE-TX, which captures what is printed, and CONSOLE-RX and
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* CONSOLE-STATUS, which hand out characters the test feeds.
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*
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* EMIT is a device service (DECOMPOSITION.md 5.10) and the mesh is not built
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* yet, so the single-node model stands in for the console with one
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@@ -16,6 +18,8 @@ static int failures = 0, checks = 0;
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/* The memory map is open (D-4); the test chooses the address. */
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#define CONSOLE_TX ((v4_cell)(V4_NODE_WORDS - 4u))
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#define CONSOLE_RX ((v4_cell)(V4_NODE_WORDS - 6u))
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#define CONSOLE_ST ((v4_cell)(V4_NODE_WORDS - 7u))
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#define MARK ((v4_cell)0x1234)
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static v4_node n;
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@@ -37,7 +41,7 @@ static int run(v4_cell word)
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int main(void)
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{
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v4_cell w_hi;
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v4_cell w_hi, w_in;
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unsigned i;
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printf("v4 console tests: V4_CELL_BITS=%d, capture %u characters\n",
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@@ -114,12 +118,126 @@ int main(void)
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v4_node_store(&n, 0, 'z');
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CHECK(n.console_len == 1 && n.console[0] == 'z' && n.mem[0] == MARK, "a console at word 0");
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/* ---- the receive side: CONSOLE-RX and CONSOLE-STATUS ---- */
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/* Not attached: both addresses are ordinary memory to a fetch. */
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v4_node_reset(&n);
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CHECK(n.console_rx == -1 && n.console_status == -1 && n.input_len == 0 && n.input_pos == 0,
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"reset leaves no input attached");
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n.mem[CONSOLE_RX] = MARK; n.mem[CONSOLE_ST] = MARK + 1;
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == MARK && v4_node_fetch(&n, CONSOLE_ST) == MARK + 1,
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"with no input attached a fetch reads memory");
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CHECK(v4_node_console_feed(&n, "x", 1) == 1 && v4_node_fetch(&n, CONSOLE_RX) == MARK,
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"and fed characters reach nobody");
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/* Attached and empty. */
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v4_node_console_input_attach(&n, CONSOLE_RX, CONSOLE_ST);
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CHECK(n.input_len == 0, "attaching empties the queue");
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CHECK(v4_node_fetch(&n, CONSOLE_ST) == 0, "status is 0 with nothing pending");
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == -1 && v4_node_fetch(&n, CONSOLE_RX) == -1,
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"an empty receive register reads -1");
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CHECK(n.mem[CONSOLE_RX] == MARK && n.mem[CONSOLE_ST] == MARK + 1, "the fetches left memory alone");
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CHECK(v4_node_load(&n, CONSOLE_RX) == MARK && v4_node_load(&n, CONSOLE_ST) == MARK + 1,
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"v4_node_load still reads the memory words");
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/* Fed: status says so and does not consume; each receive takes one. */
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CHECK(v4_node_console_feed(&n, "Hi", 2) == 2, "two characters fed");
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CHECK(v4_node_fetch(&n, CONSOLE_ST) == -1 && v4_node_fetch(&n, CONSOLE_ST) == -1, "status is -1, however often it is read");
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == 'H', "the first character");
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CHECK(v4_node_fetch(&n, CONSOLE_ST) == -1, "one still pending");
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == 'i', "the second character");
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CHECK(v4_node_fetch(&n, CONSOLE_ST) == 0 && v4_node_fetch(&n, CONSOLE_RX) == -1, "then nothing");
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/* Every byte comes back as 0 .. 255, never negative. */
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for (i = 0; i < 256; i++) {
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unsigned char c = (unsigned char)i;
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CHECK(v4_node_console_feed(&n, &c, 1) == 1 && v4_node_fetch(&n, CONSOLE_RX) == (v4_cell)i, "byte %u", i);
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}
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/* A store to either address is a memory store and feeds nothing. */
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v4_node_store(&n, CONSOLE_RX, 'q');
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v4_node_store(&n, CONSOLE_ST, 'r');
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CHECK(n.mem[CONSOLE_RX] == 'q' && n.mem[CONSOLE_ST] == 'r' && v4_node_fetch(&n, CONSOLE_ST) == 0,
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"stores to the receive registers go to memory");
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n.mem[CONSOLE_RX] = MARK; n.mem[CONSOLE_ST] = MARK + 1;
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/* Through the executor: @b, @ and @+ each reach the registers. */
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v4_asm_begin(&as, &n, 64);
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w_in = v4_asm_label(&as);
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LIT(CONSOLE_ST); O(BANG_B); O(FETCH_B); /* @b status */
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LIT(CONSOLE_RX); O(BANG_A); O(FETCH_A); /* @ a character */
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LIT(CONSOLE_RX); O(BANG_A); O(FETCH_INC); /* @+ another */
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LIT(CONSOLE_ST); O(BANG_A); O(FETCH_A); /* @ status again */
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O(SEMI);
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CHECK(v4_asm_ok(&as), "input test word assembles");
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CHECK(v4_node_console_feed(&n, "ok", 2) == 2, "fed");
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CHECK(run(w_in), "the word returns");
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CHECK(v4_dstack_pop(&n.ds) == 0 && v4_dstack_pop(&n.ds) == 'k' && v4_dstack_pop(&n.ds) == 'o'
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&& v4_dstack_pop(&n.ds) == -1, "@b, @ and @+ read status, 'o', 'k', status");
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CHECK(n.mem[CONSOLE_RX] == MARK && n.mem[CONSOLE_ST] == MARK + 1, "memory at the registers is untouched");
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/* The code itself is never taken for a register: a literal equal to a
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* register's address, and code placed at one. */
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{
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v4_cell end = v4_asm_label(&as), at;
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v4_asm w2;
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v4_cell w_lit;
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/* a second word: ( -- 'o' 77 ) CONSOLE-RX a! @ 77 ; */
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v4_asm_begin(&w2, &n, 128);
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w_lit = v4_asm_label(&w2);
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v4_asm_lit(&w2, CONSOLE_RX); v4_asm_op(&w2, V4_OP_BANG_A); v4_asm_op(&w2, V4_OP_FETCH_A);
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v4_asm_lit(&w2, 77); v4_asm_op(&w2, V4_OP_SEMI);
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CHECK(v4_asm_ok(&w2), "second input test word assembles");
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end = v4_asm_label(&w2);
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/* put the status register on each word of that code in turn: the
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* instruction words and both literals are still read as memory */
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for (at = 128; at < end; at++) {
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v4_node_console_input_attach(&n, CONSOLE_RX, at);
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CHECK(v4_node_console_feed(&n, "o", 1) == 1 && run(w_lit)
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&& v4_dstack_pop(&n.ds) == 77 && v4_dstack_pop(&n.ds) == 'o',
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"code and literals at a register's address are read as memory [%ld]", (long)at);
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}
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CHECK(end - 128 >= 3, "the word spans instruction words and literals");
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}
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v4_node_console_input_attach(&n, CONSOLE_RX, CONSOLE_ST);
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/* The queue holds V4_CONSOLE_CAP unread characters, in order. */
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{
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static unsigned char big[V4_CONSOLE_CAP + 5u];
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unsigned ok = 1;
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for (i = 0; i < sizeof big; i++) big[i] = (unsigned char)(i * 7u + 3u);
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CHECK(v4_node_console_feed(&n, big, (unsigned)sizeof big) == V4_CONSOLE_CAP, "a full queue takes no more");
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CHECK(v4_node_console_feed(&n, "x", 1) == 0, "not even one");
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for (i = 0; i < 10; i++) if (v4_node_fetch(&n, CONSOLE_RX) != big[i]) ok = 0;
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CHECK(ok, "the first ten come out in order");
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CHECK(v4_node_console_feed(&n, big, 20) == 10, "ten read makes room for ten");
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for (i = 10; i < V4_CONSOLE_CAP; i++) if (v4_node_fetch(&n, CONSOLE_RX) != big[i]) ok = 0;
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for (i = 0; i < 10; i++) if (v4_node_fetch(&n, CONSOLE_RX) != big[i]) ok = 0;
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CHECK(ok && v4_node_fetch(&n, CONSOLE_ST) == 0, "and everything comes out in the order it went in");
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}
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/* Output and input do not disturb each other. */
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v4_node_console_attach(&n, CONSOLE_TX);
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CHECK(v4_node_console_feed(&n, "A", 1) == 1, "fed");
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v4_node_store(&n, CONSOLE_TX, 'B');
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == 'A' && n.console_len == 1 && n.console[0] == 'B',
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"the transmit and receive sides are separate");
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/* Detaching returns both addresses to memory. */
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v4_node_console_input_attach(&n, -1, -1);
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CHECK(v4_node_fetch(&n, CONSOLE_RX) == MARK && v4_node_fetch(&n, CONSOLE_ST) == MARK + 1,
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"detached, both addresses are memory again");
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CHECK(v4_node_guards_intact(&n), "guards intact");
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/* Reset detaches and empties. */
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v4_node_console_input_attach(&n, CONSOLE_RX, CONSOLE_ST);
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(void)v4_node_console_feed(&n, "left over", 9);
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v4_node_reset(&n);
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CHECK(n.console_tx == -1 && n.console_len == 0 && n.console_dropped == 0,
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"reset detaches the console and empties the capture");
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CHECK(n.console_rx == -1 && n.console_status == -1 && n.input_len == 0 && n.input_pos == 0,
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"reset detaches the input and empties the queue");
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printf(" %d checks, %d failures\n", checks, failures);
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return failures ? 1 : 0;
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